What's New In Proteus Design Suite 7.10
The following summarises the main feature enhancements in the Version 7.10 release. New peripheral simulation models are detailed here (new window) whilst minor system enhancements and modifications are announced in the members area of the support forums (new window).
ISIS and ARES Core Applications
- Lightning fast, flicker free screen redraws.
- Smooth scrolling and animated object highlighting.
- Crisp, fully anti-aliased presentation of text and graphics.
- Current layer is always drawn at the top of the view.
- User control of layer transparency.
- Option to display full solder resist and solder mask layers including shapes contributed by the pad styles.
- Dynamic rastnest during route placement indicates closest net object to track being placed.
- Automatic dimming of objects during placement helps identify valid route destinations.
- Ratsnest colours maintained during placement and movement operations.
- Only current net ratsnest lines displayed during manual routing.
- Major overhaul of DXF importer in ARES to improve support and compatibility with other packages.
- Improved zone handling to provide precise clearances around rotated objects (e.g. IC at 45 degrees).
- Ability to specify diagonal ('X') thermal reliefs on a pad.
- Block selections which include locked objects provide an option to tag all but the locked objects before an operation.
- Proteus VSM for ARM Cortex-M3/LM3S* - Simulation support for this popular microcontroller family
- CPU models for PIC16F1516,PIC16LF1516,PIC16F1518 PIC16LF1518, PIC16F1517,PIC16LF1517, PIC16F1519,PIC16LF1519
- CPU models for PIC18(L)F24J50, PIC18(L)F25J50, PIC18(L)F26J50,PIC18(L)F44J50/ML, PIC18(L)F45J50/ML
- CPU models for PIC18(L)F46J50/ML (with AVDD, AVSS), PIC18(L)F44J50/PT, PIC18(L)F45J50/PT, PIC18(L)F46J50/PT (without AVDD, AVSS)
- Various peripheral models as per the peripherals page
Hardware Accelerated Direct2D Graphics Engine
Manual Route Editing & Ratsnest
Other Features and Changes
Proteus VSM
What's New In Proteus Design Suite 7.9
The following summarises the main feature enhancements in the Version 7.9 release. New peripheral simulation models are detailed here (new window) whilst minor system enhancements and modifications are announced in the members area of the support forums (new window).
ISIS and ARES Core Applications
- Fully design rule aware track placement.
- Designed to follow the path of the mouse from source to destination.
- Rewind by moving the mouse backwards over existing track during placement.
- Dropping vias is also design rule aware preventing illegal placement.
- Floating vias on the end of the track being placed allows for precise positioning while obeying board constraints.
- New chamfer and bend radius parameters on through hole DIL pads.
- Design rule system and resist plot generation updated to cater for new pad topologies.
- Pads are now allowed to have a specified negative guard gap.
- Clickable co-ordinates in the Pre-production checker allow easy navigation and inspection of reported problems.
- 'Move-to' command added for block selection operations on the context menu. This allows absolute positioning of blocks of circuitry and, together with use of the false origin, �also allows either for a relative offset of a block.
- 2D Graphics placement enabled in the gerber viewer, allowing for tab routes during panelisation.
- Added option to apply text styles to all 2D text on the layout via the Text Styles command on the Technology Menu.
- Added additional ERC check in ISIS to detect singular net labels. This normally happens when a terminal name has been mistyped.
- VSM For Texas Instruments PICCOLO TMS320 * - Simulation support for this popular family of DSP's.
- CPU models for PIC12F1822,PIC16LF1824,PIC16LF1825, PIC16LF1826, PIC16LF1827,PIC16LF1828, PIC16LF1946,PIC16LF1947
- CPU models for PIC18F23K22,PIC18F24K22,PIC18F25K22,PIC18F26K22,PIC18F43K22,PIC18F44K22,PIC18F45K22,PIC18F46K22
- CPU models for PIC18F65K22, PIC18F66K22, PIC18F67K22, PIC18F85K22, PIC18F86K22, PIC18F87K22
- CPU models for PIC12F1840 and PIC12LF1840
New Follow Me Routing system in ARES
Pad Style Enhancements in ARES
Other Features and Changes
Proteus VSM
Proteus 7.9 is available free of charge to all customers whose USC is valid as of 01st April 2011
What's New In Proteus Design Suite 7.8
The following summarises the main feature enhancements in the Version 7.8 release. New peripheral simulation models are detailed here (new window)whilst minor system enhancements and modifications are announced in the members area of the support forums (new window).
ISIS and ARES Core Applications
- Templates for PCB Layout.
- Board Edge, Drill Holes, mechanical data, etc can all be pre-placed.
- Design Rules and Net Classes may be pre-defined.
- Grids, start-up units, layer usage and font sizes may be pre-defined.
- Technology data can be used for new designs and/or applied to existing ones.
- Switch between visible layers and colours from the View-Layers dialogue.
- Use different colour sets for printing as opposed to editing.
- Work with a non-black background colour.
- Improved 'follow-me' wire routing in ISIS.
- Added dimension display of pads styles in the Overview Window in ARES.
- Ported and re-written all help documentation in HTMLHelp format.
- Fully compatible with Windows 7.
- CPU models for PIC24F04KA200, PIC24F04KA101, PIC24F08KA101, PIC24F08KA102, PIC24F16KA101, PIC24F16KA102
- VSM Studio IDE * - an IDE for Proteus VSM that greatly simplifies the process of building your source code and attaching the resulting firmware to a schematic.
- Lots of new sample designs for AVR and 8051 microprocessors.
Layout Technology Files / Technology Menu
Colour Sets in ARES
Other Features and Changes
Proteus VSM
What's New In Proteus Design Suite 7.7
The following summarises the main feature enhancements in the Version 7.7 release. New peripheral simulation models are detailed here (new window) whilst minor system enhancements and modifications are announced in the members area of the support forums. (new window)
ISIS and ARES Core Applications
Pre-Production Checklist (automated quality assurance tool)
- Runs CRC & DRC tests to validate physical connectivity and design rule clearances.
- Verifies power plane placement and integrity through a secondary code path.
- Tests component and trace integrity.
- Tests for unplaced components specified in the netlist.
- Tests for presence and integrity of board edge and that all parts are inside the board edge.
- Tests via drill ranges.
3D Visualisation Engine
- Ability to save and restore default colour settings.
Generic
- DRC errors now have a manual override (right click on the DRC Window)
- Support for IDF Format export to Solidworks.
Proteus VSM CPU Models *
- PIC18F8680, PIC18F8585
- MSP430F2112, MSP430F2122, MSP430F2132, MSP430F2232, MSP430F2252, MSP430F2272
- MSP430F233, MSP430F235, MSP430F247, MSP430F248, MSP430F249, MSP430F2330
- MSP430F2350, MSP430F23570, MSP430F2410, MSP430F2416, MSP430F2417
- MSP430F2418, MSP430F2419, MSP430F2471, MSP430F2481, MSP430F2491
What's New In Proteus Design Suite 7.6
The following summarises the main feature enhancements in the Version 7.6 release. New peripheral simulation models are detailed here (new window) whilst minor system enhancements and modifications are announced in the members area of the support forums. (New Window)
ISIS and ARES Core Applications
Hardware Accelerated / OpenGL Graphics Engine *
- Lightning fast, flicker free screen redraws.
- Smooth scrolling and animated object highlighting.
- Crisp, fully anti-aliased presentation of text and graphics.
- Current layer is always drawn at the top of the view.
- User control of layer transparency with full alpha-blended options.
- Ability to display full solder resist and solder mask layers including shapes contributed by pad styles.
3D Visualisation Engine
- Hide components to provide bareboard view.
- Full support for holes, slots and board cut-outs.
- Solder resist (and exposed solder) is shown.
- Correct display of bitmaps.
Generic
Proteus VSM CPU Models *
- PIC18F63J90, PIC18F64J90, PIC18F65J90.
- PIC18F83J90, PIC18F84J90. PIC18F85J90.
- PIC18F6390, PIC18F6490, PIC18F8390, PIC18F8490.
- PIC18F6393, PIC18F6493, PIC18F8393, PIC18F8493.
- Added loader/debug support for Bascom AVR Compiler.
- more... Proteus VSM for MSP430 (new product family).
What's New In Proteus Design Suite 7.5
ISIS and ARES Core Applications::
- Improved Library Search facility including the ability to search by library and stockcode and a filter to show only parts with simulation models.
- Ability to directly output library index properties e.g. Manufacturer (MFR), Stock/Order Code (CODE) and Description (DESC) in the Bill of Materials.
- Full, nominal density implementation of the IPC-7351 surface mount land pattern standard footprint libraries.
- Ability to specify a filename for the PCB Layout associated with a given schematic.
- Option to allow inner zones (zone nesting) in power plane generation.
- Support for rounded rectangle SMT pads and fiducials in PCB footprints.
- Increased visibility for power plane boundaries.
- Choice of database, CADCAM or temporary origins in the GotoXY command.
- Dimensions display on PCB package previews.
- Option to print each PCB layer on a seperate page.
Over 20,000 new Library Parts (most with models and digikey stockcodes)
- Chip Resistors - several tolerances and powers - from Panasonic and Yageo.
- Varistors from Littlefuse.
- Resistive Trimmers - single, 5, 11 & 12 turns from Bourns.
- Poly and thin film, Ceramic Multilayer, Mica RF, Aluminium and Tantalum capacitors from various manufacturers.
- Fixed, multilayer and tight tolerance RF inductors.
- Rectifier, Schottky, Switching, TVS, Varicap and Zener diodes.
- BJT's, IGBT, JFET and MOSFETs.
- Diacs, SCR and Triacs switching devices.
Proteus VSM Additions
- Full Debugging support (source code stepping, breakpoints and variables display) for EasyHDL scriptable generators.
- Pre-defined SPICE option sets for standard defaults, improved convergence and improved accuracy.
- Display of elapsed time between pause/breakpoints allows easy measurement of code execution times.
- Automatic single stepping (step animation) with user defined time interval between steps.
Proteus VSM CPU Models: - Requires appropriate VSM licence
- more... ATMEGA169, ATMEGA169P, ATMEGA329, ATMEGA3290, ATMEGA329P, ATMEGA649, ATMEGA6490
- more... PIC16F818, PIC16F819
- more... PIC18F1230, PIC18F1330, PIC18F2480, PIC18F2580, PIC18F4480, PIC18F4580, PIC18F2585, PIC18F2680, PIC18F4585, PIC18F4680
- Proteus VSM for 8086 (new product) plus 8255, 8253, 8251, 8279
What's New In Proteus Design Suite 7.4
PCB Design : NEW Shape Based Autorouter
- more... High Completion rates on even the most complex of boards.
- Shape Based (gridless) technology vastly improves routing performance of fine pitch SMD parts and densely packed PCB's.
- Adaptive, cost based algorithms minimise via counts and overall trace length, providing results which are often hard to distinguish from manual routing.
- Fully automated routing operation is included as standard whilst batch mode (scripted) and interactive modes are available in PCB Design Level 2 and higher.
- Interactive mode provides the ability to route a user specified selection (for example, to route only one net).
- Comprehensive command set enhances the flexibility of advanced routing modes (e.g. specifying fanout distances and direction)
Proteus VSM Simulation :
- more... Introduced the new dsPIC33 microcontroller family.
- more... Added support for USB Device Simulation with Atmel AVR microcontrollers (AT90USB646, AT90USB1286).
- 17 additional new Atmel AVR Variants added.
- New models for Texas Instruments Op-amps and miscellaneous others.
Miscellaneous Additions :
- more... Syntax Highlighting for EasyHDL scripts added.
- Improved algorithm for both guided and unguided device replacement within ISIS.
- Replaced routing strategies with 'net classes' which can be configured directly from the Design Rule Manager.
What's New In Proteus Design Suite 7.3
ISIS and ARES Core Applications::
- more... Added support for the industry standard ODB++ Manufacturing Output Format (requires PCB Design Level 2 or Higher)
- Added Design Rule Manager to ARES, allowing fully customisable board constraints. Includes the ability to set rules by layer and/or by strategy and also to create rules governing behaviour between strategies on the board.
- Added support for IEEE / North American component symbols to the capacitors and resistors libraries.
- Support for specifying PTH/Non Plated holes.
- Fully compatible with Windows VistaTM.
Proteus VSM Additions
- Extensive work on the core simulation engine, resulting in simulation speeds up to 100% faster than previously, better convergence algorithms and improved simulation accuracy.
- Added Syntax Highlighting to the VSM Source Window.
- more... Added scriptable generators using EasyHDL : a rich. high level scripting language based on BASIC. This allows the scripting of arbitrary stimuli to a simulation via the generator dialogue form. Requires a licence for Advanced Simulation Features.
- New Virtual Terminal with ANSI/VT52/VT100 and X/Y/Zmodem protocol support.
- Debugger plugin for Atmel AVR Studio.
- Updated VUSB drivers including support for CDC & custom HID classes.
Proteus VSM CPU Models: - Requires appropriate VSM licence
- more... ATMEGA128, ATMEGA1280, ATMEGA1281, ATMEGA164P, ATMEGA168, ATMEGA168P
- ATMEGA2560, ATMEGA2561, ATMEGA324P, ATMEGA328P, ATMEGA48, ATMEGA48P
- ATMEGA640, ATMEGA644, ATMEGA644P, ATMEGA88, ATMEGA88P
- ATTINY11, ATTINY12, ATTINY13, ATTINY15, ATTINY24, ATTINY25, ATTINY44, ATTINY45
- ATTINY2313, ATTINY261, ATTINY461, ,ATTINY84, ATTINY85, ATTINY861
- PIC12F683, PIC16F688